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Digital signal processing application based on residue number system
Rolko, Maroš ; Bohrn, Marek (referee) ; Younes, Dina (advisor)
Tato práce se zabývá systémem zbytkových tříd a jeho aplikacemi v digitálních obvodech. První část se zabývá VHDL návrhem různých typů sčítaček v systému zbytkových tříd a jejich porovnání se standartními sčítačkami. V druhé části je implementován obrázkový processor který pracuje v systému zbytkových tříd a jeho výkonostní analýza. V textu je popsán postup návrhu a jsou prezentovány výsledky analýz.
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Design of FPGA Development Kit
Zach, Petr ; Levek, Vladimír (referee) ; Fujcik, Lukáš (advisor)
This bachelor thesis focuses on the design of a FPGA development kit for the development and implementation of logic circuits. The first chapter describes the various types of programmable logic devices and compares their advantages and disadvantages. Furthermore, the first chapter also describes the most common configurations of programmable logic devices and compares them to each other. The second chapter provides an in-depth description of the 7 series Xilinx FPGA architecture. The third chapter describes the design of the development kit and the programming device. Furthermore, the third chapter summarizes the available resources of the used FPGA as well as the devices and ports that are part of the development kit, and compares the development kit to other development kits available on the market. The final chapter outlines the process of producing and testing a development kit prototype.
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Design of FPGA Development Kit
Zach, Petr ; Levek, Vladimír (referee) ; Fujcik, Lukáš (advisor)
This bachelor thesis focuses on the design of a FPGA development kit for the development and implementation of logic circuits. The first chapter describes the various types of programmable logic devices and compares their advantages and disadvantages. Furthermore, the first chapter also describes the most common configurations of programmable logic devices and compares them to each other. The second chapter provides an in-depth description of the 7 series Xilinx FPGA architecture. The third chapter describes the design of the development kit and the programming device. Furthermore, the third chapter summarizes the available resources of the used FPGA as well as the devices and ports that are part of the development kit, and compares the development kit to other development kits available on the market. The final chapter outlines the process of producing and testing a development kit prototype.
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I2C-Based Interfaces and Their Implementation Possibilities in Current ASIC Technologies
Podzemný, Jakub ; Ambrož, Jaromír (referee) ; Fujcik, Lukáš (advisor)
This work deals with implementation possibilities of I2C, SMBus and PMBus interfaces in current ASIC technologies. In first part of this work are descriptions of these interfaces considering their actual specifications and differences between them from digital and functional point of view. The analog part of this issue is for the most part ignored. Additional part is focused on comparison of selected Verilog HDL I2C/SMBus slave modules developed by ON Semiconductor company by size, function and mainly by optimization and extension possibilities. Last part of this work deals with newly designed I2C-based interfaces. New I2C slave, SMBus and PMBus slave modules are described in Verilog HDL language.
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Digital signal processing application based on residue number system
Rolko, Maroš ; Bohrn, Marek (referee) ; Younes, Dina (advisor)
Tato práce se zabývá systémem zbytkových tříd a jeho aplikacemi v digitálních obvodech. První část se zabývá VHDL návrhem různých typů sčítaček v systému zbytkových tříd a jejich porovnání se standartními sčítačkami. V druhé části je implementován obrázkový processor který pracuje v systému zbytkových tříd a jeho výkonostní analýza. V textu je popsán postup návrhu a jsou prezentovány výsledky analýz.
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